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Digital Circuit Card Assembly Design Engineer - SIS
Ref No.: 18-11930
Location: Palm Bay, Florida
• Thorough understanding of digital CCA design process including requirements generation, preliminary design, peer reviews, detailed design, test plan generation, and integration and test.
• Understand the requirements and architect a digital CCA solution against those requirements including the use of DSP, Microcontroller, FPGA, ASIC, CPLD, ADC, DAC, Point of Load (POL), SERDES, Serial (I2C, SPI, etc), and volatile/non-volatile memory (DDRx, SRAM, ROM, Flash, etc) components.
• Simulate the digital CCA circuits to verify performance, then integrate and test the CCA into the higher level assembly (Signal Integrity simulation).
• Lead a small team of designers in generating the digital CCA design solutions.
Required Experience  
Bachelor’s Degree and minimum 6 years of prior relevant experience. Graduate Degree and a minimum of 4 years of prior related experience.
Desired Skills  
• Experience with design for test and design for manufacturability techniques. • Experience with high reliability designs for harsh environments (radiation effects). • Experience with high speed memory interfaces (DDRx). • Experience with high speed serial protocols (PCI Express, SRIO, Ethernet). • Experience with Analog to Digital (AD) and Digital to Analog (DA) interfaces. • Experience with control protocols such I2C, SPI, RS-232/422, and SpaceWire. • Experience performing Worst-Case Performance and Stress Analysis. • Experience with test equipment such as oscilloscopes, spectrum analyzers, logic analyzers, and protocol analyzers. • Self-motivated individual with the ability to work and communicate effectively within a development group. • Ability to work in a team environment and negotiate solutions with Hardware / Software Engineering and Systems Engineering is preferred. • Proficiency with the Cadence toolset for CCA design (Schematic Capture, Constraint-Driven Layout, Simulation, Timing Analysis) is desired
Years of Experience  
6 Years Minimum