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SoC Design Verification Engineer
Ref No.: 18-21143
Location: San Diego, California
Title: SoC Design Verification Engineer
Location: San Diego CA
Duration: 9 months

Job Overview:

As a Functional Verification Engineer, you will be responsible for understanding the expected functionality of designs, developing corresponding testplans, designing and developing components of our verification environment, and applying these to verify complex designs until coverage goals are achieved in order to ensure the continued commercial success of our high-quality products. These designs are wireless SOCs targeted for high-performance Smartphones and Tablets.
Minimum Qualifications:
Strong critical thinking, problem solving and test planning skills. -Design verification experience (developing test plan, test bench, tests, assertions, functional & code coverage, debugging tests and designs) -General knowledge in ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc. -Familiar with the design, verification and assertion languages: RTL, VHDL, Verilog, System Verilog, System Verilog Assertions (SVA), Vera, e-Specman, etc. -Knowledge of SOC, ARM processor, AMBA bus, DDR, or peripherals is preferred -Scripting and automation skills: Unix/Linux shell programming, Perl, Makefile, revision management (e.g. CVS, ClearCase) is a plus. As verification is a rapidly changing field and consumes the majority of the design process, developing and deploying new verification methodologies is an essential part of the work you will do. Assertions, simulation, formal verification, HW-SW co-verification and constraint/HVL-based verification are all tools in our verification toolbox you will use on a daily basis.
Preferred Qualifications:
Please see minimum qualifications
Education:
Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering or equivalent experience