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Digital Design Engineers for Mixed Signal ASICs.
Ref No.: 18-15686
Location: San Diego, California
Responsibilities include: Digital design and analog/mixed signal design support for PLL, DAC, Client and other mixed-signal designs. Digital design aspects include full behavioral level description with high level synthesis languages and gate level synthesis, logic level synthesis, timing closure, power and signal integrity analysis and testability. Analog/mixed-signal support includes behavioral modeling of RF and analog blocks using Verilog in the cadence AMS environment and analog/digital integration and verification methodologies using Cadence AMS. Work in a dynamic team environment with aggressive schedule, chip power consumption and area targets.

Minimum Qualifications:
Bachelors degree in Electrical Engineering or Computer Engineering and 5 years of relevant experience with the following: - Digital ASIC design including architecture - RTL design for control and datapath, linting, synthesis, STA, and DFT - Experience with leading-edge ASIC development tools from Synopsys, Mentor, or Cadence

Preferred Qualifications:
- Masters degree in Electrical Engineering or Computer Engineering - Experience designing mixed signal interfaces and integrating digital modules into mixed-signal ASICs

Education:
Required: Bachelor's, Electrical Engineering Preferred: Master's or equivalent experience